Technical Field
The present disclosure relates to microelectronic devices, such as semiconductor devices composed of strained semiconductor materials and capacitors.
Description of the Related Art
Complementary Metal-oxide-semiconductor (CMOS) technology is commonly used for fabricating field effect transistors (FETs) as part of advanced integrated circuits (IC), such as CPUs, memory, storage devices, and the like. At the core of FETs, a channel region is formed in an n-doped or p-doped semiconductor substrate on which a gate structure is formed. Depending whether the on-state current is carried by electrons or holes, the FET comes as an n-FET device or a p-FET device. The overall fabrication process may include forming a gate structure over a channel region connecting source-drain regions within the substrate on opposite sides of the gate, typically with some vertical overlap between the gate and the source-drain region. The dimensions of semiconductor field effect transistors (FETs) have been steadily shrinking over the last thirty years or so, as scaling to smaller dimensions leads to continuing device performance improvements. On-chip decoupling capacitor (DECAP) is desired in some applications. On-chip capacitors consume a significant chip area. With increasing device scaling, new capacitor arrangements are being examined.